Detecção de operações de redução em programas C
Resumo
Os atuais compiladores dotados de recursos para paralelização automática de código limitam-se a detectar trechos de código paralelizáveis automaticamente, não reportando trechos de código candidatos a paralelização por reprogramação manual. Este artigo apresenta uma estratégia para detecção de trechos de código refletindo o padrão iterativo de redução candidatos a paralelização por transformação manual. A validação foi realizada comparando os resultados obtidos com os apresentados por Cetus sobre o benchmark BOTS. A análise dos resultados indicou a validade da proposta, sendo discutidos os casos de falsos positivos reportados na aplicação da técnica proposta.Referências
Amini, M. et al. (2012). Par4all: From convex array regions to heterogeneous computing. In 2nd International Workshop on Polyhedral Compilation Techniques, Impact.
Bae, H., Mustafa, D., Lee, J.-W., Lin, H., Dave, C., Eigenmann, R., Midkiff, S. P., et al. (2013). The Cetus source-to-source compiler infrastructure: overview and evaluation. International Journal of Parallel Programming, 41(6):753–767.
Duran, A., Teruel, X., Ferrer, R., Martorell, X., and Ayguade, E. (2009). Barcelona OpenMP tasks suite: A set of benchmarks targeting the exploitation of task parallelism in OpenMP. In 2009 Inter. Conf. on Parallel Processing, pages 124–131. IEEE.
Harel, R., Mosseri, I., Levin, H., Alon, L.-o., Rusanovsky, M., and Oren, G. (2020). Source-to-source parallelization compilers for scientific shared-memory multi-core Inand accelerated multiprocessing: analysis, pitfalls, enhancement and potential. ternational Journal of Parallel Programming, 48(1):1–31.
Jradi, W. A. R., Dantas do Nascimento, H. A., and Santos Martins, W. (2018). A fast and generic GPU-based parallel reduction implementation. In 2018 Symposium on High Performance Computing Systems (WSCAD), pages 16–22.
Lee, S.-I., Johnson, T. A., and Eigenmann, R. (2003). Cetus–an extensible compiler infrastructure for source-to-source transformation. In International Workshop on Languages and Compilers for Parallel Computing, pages 539–553. Springer.
Parhami, B. (2002). Introduction to Parallel Processing: Algorithms and Architecture. Kluwer Academic, New York.
Prema, S. and Jehadeesan, R. (2013). Analysis of parallelization techniques and tools. International Journal of Information and Computation Technology, 3(5):471–478.
Quinlan, D. and Liao, C. (2011). The ROSE source-to-source compiler infrastructure. In Cetus users and compiler infrastructure workshop, in conjunction with PACT. ACM.
Tian, X., Hoeflinger, J. P., Haab, G., Chen, Y.-K., Girkar, M., and Shah, S. (2005). A compiler for exploiting nested parallelism in OpenMP programs. Parallel Computing, 31(10-12):960–983.
Bae, H., Mustafa, D., Lee, J.-W., Lin, H., Dave, C., Eigenmann, R., Midkiff, S. P., et al. (2013). The Cetus source-to-source compiler infrastructure: overview and evaluation. International Journal of Parallel Programming, 41(6):753–767.
Duran, A., Teruel, X., Ferrer, R., Martorell, X., and Ayguade, E. (2009). Barcelona OpenMP tasks suite: A set of benchmarks targeting the exploitation of task parallelism in OpenMP. In 2009 Inter. Conf. on Parallel Processing, pages 124–131. IEEE.
Harel, R., Mosseri, I., Levin, H., Alon, L.-o., Rusanovsky, M., and Oren, G. (2020). Source-to-source parallelization compilers for scientific shared-memory multi-core Inand accelerated multiprocessing: analysis, pitfalls, enhancement and potential. ternational Journal of Parallel Programming, 48(1):1–31.
Jradi, W. A. R., Dantas do Nascimento, H. A., and Santos Martins, W. (2018). A fast and generic GPU-based parallel reduction implementation. In 2018 Symposium on High Performance Computing Systems (WSCAD), pages 16–22.
Lee, S.-I., Johnson, T. A., and Eigenmann, R. (2003). Cetus–an extensible compiler infrastructure for source-to-source transformation. In International Workshop on Languages and Compilers for Parallel Computing, pages 539–553. Springer.
Parhami, B. (2002). Introduction to Parallel Processing: Algorithms and Architecture. Kluwer Academic, New York.
Prema, S. and Jehadeesan, R. (2013). Analysis of parallelization techniques and tools. International Journal of Information and Computation Technology, 3(5):471–478.
Quinlan, D. and Liao, C. (2011). The ROSE source-to-source compiler infrastructure. In Cetus users and compiler infrastructure workshop, in conjunction with PACT. ACM.
Tian, X., Hoeflinger, J. P., Haab, G., Chen, Y.-K., Girkar, M., and Shah, S. (2005). A compiler for exploiting nested parallelism in OpenMP programs. Parallel Computing, 31(10-12):960–983.
Publicado
26/10/2021
Como Citar
REZENDE, João Ladeira; SANTOS, Edevaldo Braga dos; CAVALHEIRO, Gerson Geraldo H..
Detecção de operações de redução em programas C. In: SIMPÓSIO EM SISTEMAS COMPUTACIONAIS DE ALTO DESEMPENHO (SSCAD), 22. , 2021, Belo Horizonte.
Anais [...].
Porto Alegre: Sociedade Brasileira de Computação,
2021
.
p. 204-215.
DOI: https://doi.org/10.5753/wscad.2021.18524.
