BBM - um Processador de Blocos Básicos

  • Edil S. T. Fernandes UFRJ
  • Gabriel P. Silva UFRJ

Resumo


This work presents BBM - a machine oriented towards the execution of basic blocks. Instead of an instruction, the BBM standard unit of processing is the basic block. Many facts regarding the instruction usage of ordinary programs remained unknown for several decades because the traditional processing model, which treats a single instruction as the standard unit, is unable to detect what is happening whith the whole program. With a basic block machine it is possible to have a better insight about the behaviour of the programs. For example, through the experiments involving the execution of the SPECint95 suite on BBM, we found that a very large number of instructions remains unused during the whole execution: in the majority of the programs more than 50% of the instructions remained unused. Disclosed by our Basic Block Machine, this object programs characteristic has many implications on the organization and performance of future processors. Instruction caches and fill units would be much more efficient if the task of mapping instructions onto caches takes in to account the usage and frontiers of the basic blocks. The paper gives an overview of the execution model of our Basic Block Machine, describes the BBM support system, and presents the main results of our experiments.

Palavras-chave: Computer Architecture, Basic Blocks, Instruction Cache

Referências

Thomas M. Conte, Kishore N. Menezes, Patrick M. Mills, Burzin A. Patel, "Optimization of lnstruction Fetch Mechanisms for High Issue Rates," Proceedings of the 22nd Annual International Symposium on Computer Architecture, ISCA '95, Santa Margherita Ligure. ltaly, June 1995, pp. 333-344.

Peter J. Denning, "Virtual Memory," Computing Surveys, Vol.2, September 1970, pp. 153-189.

Doug Burger and Todd M. Austin, "The SimpleScalar Tool Set, Version 2.0," Technical Report #1342, Computer Sciences Department, University of Wisconsin-Madison, June 1997, pp. 1-21.

Eric Rotenberg, Steve Bennet, and James E. Smith, "Trace Cache: a Low Latency Approach to High Bandwidth lnstruction Fetching," Proceedings of the 29th Annual International Symposium on Microarchitecture, Paris, France, December 1996, pp. 24-34.

Joseph A. Fisher, "VLIW Machine: A Multiprocessor for Compiling Scientific Code," Computer, July 1984, pp. 45-53.

John L. Hennessy and David A. Patterson, Computer Architecture: a Quantitative Approach. Morgan Kaufmann Publishers, Inc., San Mateo, California, U.S.A .. 1st Edition, 1990.

D. E. Knuth, "An Empirical Study of FORTRAN Programs," Software-Practice & Experience, Vol.1, 1971, pp. 105-133.

David Landskov, Scou Davidson, Bruce Shriver, and Patrick W. Mallet, "Local Microcode Compaction Techniques," Computing Surveys, Vol. 12, No. 3, September 1980, pp. 261-294.

André Seznec, Stéphan Jourdan, Pascal Sainrat, and Pierre Michaud, "Multiple-Block Ahead Branch Predictors," Proceedings of the 7th Symposium on Architectural Support for Programming Languages and Operating Systems, ASPLOS, 1996, pp. 116-127.

Stephen W. Melvin, Michael C. Shebanov, and Yale N. Patt, "Hardware Support for Large Atomic Units in Dynamically Scheduled Machines," Proceedings of the 21st Annual Workshop on Microprogramming and Microarchitecure, San Diego, CA., November 1988, pp. 60-63.

Sanjay J. Patel, Marius Evers, and Yale N. Patt, "lmproving Trace Cache Effectiveness with Branch Promotion and Trace Packing," Proceedings of the 15th International Symposium on Computer Architecture, Barcelona, Spain, June 1988.

Sanjay J. Patel, Daniel H. Friendly, and Yale N. Patt, "Critical Issues Regarding the Trace Cache Fetch Mechanism," Technical Report CSE-TR-335-97, University of Michigan, May 1997, pp. 1-33.
Publicado
25/10/2000
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FERNANDES, Edil S. T.; SILVA, Gabriel P.. BBM - um Processador de Blocos Básicos. In: SIMPÓSIO EM SISTEMAS COMPUTACIONAIS DE ALTO DESEMPENHO (SSCAD), 1. , 2000, São Pedro/SP. Anais [...]. Porto Alegre: Sociedade Brasileira de Computação, 2000 . p. 3-8. DOI: https://doi.org/10.5753/wscad_estendido.2000.19135.