Web Simulator for Teaching Computer Architecture with Vector and Cache Support

• João Pedro R. Linares UFPEL
• Andre Rauber Du Bois UFPEL
• Gerson Geraldo H. Cavalheiro UFPEL

DOI: https://doi.org/10.5753/sscad.2025.15861

Abstract

This article presents NeanderWeb-V, a web-based simulator of the didactic Neander-V architecture, which extends the original Neander with support for vectorization and cache. The tool is accessible directly through web browsers and was designed to support introductory teaching of Computer Architecture and Programming. Its main feature is the exposure of hardware-level parallelism mechanisms, allowing students to observe the impact of the parallel resources in the Neander-V architecture on program performance. Programs can be written, executed, and debugged directly in the browser, in a modular and informative environment. A case study conducted with first-semester Computer Science students indicated high usability and ease of use, reinforcing the pedagogical potential of the tool.

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