Energy Efficiency Evaluation of Multi-level Parallelism on Low Power Processors

• Vinícius Pinto UFRGS
• Arthur Lorenzon UFRGS
• Antonio Carlos Beck UFRGS
• Nicolas Maillard UFRGS
• Philippe Navaux UFRGS

Resumo

Energy efficiency and consumption are becoming major concerns in HPC area. One considered alternative to reach better energy efficiency has been the use of unconventional architectures in the HPC scenario, e.g., embedded and mobile processors. In this paper, we present an evaluation about the use of multi-level parallelism in two low-power architectures: Intel Atom and ARM Cortex-A9. Our results show that for all tested cases Intel Atom outperforms ARM Cortex-A9 in terms of execution time and Energy-Delay Product.

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