A1CSAH: A Fast High-Energy-Efficiency Adder
Abstract
The design of battery-powered portable devices requires energy efficient fast adders. Although many adder architectures exist, only a few can be synthesized in a standard-cells flow. This paper presents the A1CSAH, a novel energy efficient fast adder architecture. The A1CSAH, along with other architectures (CRA, CSA and CLA), were synthesized for a 45nm standard-cells library. Synthesis results show that the A1CSAH is, on average, 10.8% faster and 3.4% more energy-efficient than the CLA, thus corresponding to an excellent fast adder option.
References
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Chang, T. Y. e Hsiao, M. J. (1998) “Carry-Select Adder Using Single Ripple-Carry Adder”, In: Electronics Letters, v. 34, n. 12, p. 2101–2103.
Hwang, K. (1979) “Computer Arithmetic: Principles, architecture, and design”, New York, John Wiley & Sons.
Mesquita, E. et al. (2007) “RIC Fast Adder and its SET-Tolerant Implementation in FPGAs”, In: IEEE International Conference on Field Programmable Logic and Applications, pp. 638–641.
Monteiro, J., Güntzel, J. L., Agostini, L. (2011) "A1CSA: An Energy-Efficient Fast Adder Architecture for Cell-Based VLSI Design", In: IEEE International Conference on Electronics, Circuits and Systems, 18, Beirut, 11-14 Dec., 2011. pp. 442-445.
Oklobdzija, V. G. (2001) “Speed VLSI Arithmetic Units: Adders and Multipliers”, In: Design of High-Performance Microprocessor Circuits, USA: IEEE Press.
Rabaey, J. M., Chandrakasan, A. e Nikolic, B. (2003) “Digital Integrated Circuits: A Design Perspective”, Second edition, USA: Prentice Hall.
Takagi, N. et al. (2007) "Adders" In: Chen, W.-K. (Ed.). The VLSI handbook. Second edition. USA: CRP Press - Taylor e Francis Group.
Vahid, Frank (2006). "Digital Design", Danvers, MA: John Wiley & Sons, Inc.
Weinberger, A. e Smith, J. L. (1958) “A Logic for High-Speed Addition”, In: National Bureau of Standards, v. 591, p. 47–56.
Synopsys, (2009) “Synopsys's Design Compiler User Guide”, Versão C-2009.06.
Published
2012-07-16
How to Cite
MONTEIRO, Jucemar; AGOSTINI, Luciano; GÜNTZELL, José Luís.
A1CSAH: A Fast High-Energy-Efficiency Adder. In: SBC UNDERGRADUATE RESEARCH CONTEST (CTIC-SBC), 31. , 2012, Curitiba/PR.
Anais [...].
Porto Alegre: Sociedade Brasileira de Computação,
2012
.
p. 1-10.
