Um Multiprocessador Ortogonal Usando DSPs

  • Marcos Luiz Mucheroni UFSCar
  • José Hiroki Saito UFSCar
DOI: https://doi.org/10.5753/sbac-pad.1992.22736

Abstract


This paper shows a proposal of implementation of Orthogonal Multiprocessor (OMP) using four processors TMS 32040 sharing 16 modules of memories disposed in rows or columns, and a interface EISA-bus using others two TMS with 4 MWords of global memory and 4 MWords of expansible local memory.

References

Buehrer, R.E. et al., "The ETH Multiprocessor EMPRESS A dinamically reconfigurable MIMD system", IEEE Trans. Comput. vol. C-31, pp. 1035-1044, Nov. 1982.

Ferasoli Filho, H.; Pegoraro, R. e Saito, J.H. - "Arquitetura Multiprocessadora para Processamento de Imagens explorando Processadores Digitais de Sinais", Anais do IV Simpósio Brasileiro de Computação Gráfica e Processamento de Imagens, pp. 87-92, 1991.

Hwang, K. e Tseng, P.S., "An efficient VLSI multiprocessor for signal/image processing", in Proc. Int. Conf. Comput. Design, Out. 1985, pp. 172-176.

Hwang, K., Tseng, P.S. e Kim, D., "An Orthogonal Multiprocessor for Parallel Scientific Computations", IEEE Trans.on Comp., vol. 38, Jan. 1989.

Scherson, I.D. e Ma, Y., "Vector computations on an orthogonal memory access multiprocessing system" in Proc. 8th Symp. Comput. Arithmetic, Maio 1987, pp. 764-771.
Published
1992-10-26
How to Cite

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MUCHERONI, Marcos Luiz; SAITO, José Hiroki. Um Multiprocessador Ortogonal Usando DSPs. In: INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD), 4. , 1992, São Paulo/SP. Anais [...]. Porto Alegre: Sociedade Brasileira de Computação, 1992 . p. 583-588. DOI: https://doi.org/10.5753/sbac-pad.1992.22736.