Implementation of the SHA-3 family using AVX512 instructions

  • Roberto Cabral UFC
  • Julio López UNICAMP

Resumo


AVX512 is the newest instruction set on the Skylake-X that extends the number of registers and provides simultaneous execution of operations over register vectors of 512 bits. This work presents how the AVX512 instruction set can be exploited to develop a fast software implementation of the Secure Hash Algorithm-3 (SHA-3) family. We achieved a speedup of around 30% when compared with x64 and AVX2 implementations. We also present a parallel implementation of two eXtendable-Output Functions (XOFs), called SHAKE128 and SHAKE256, using AVX512 that are about 5.22× faster than a single message implementation. The SHAKE functions can be used to speedup hash-based digital signatures.

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Publicado
25/10/2018
CABRAL, Roberto; LÓPEZ, Julio. Implementation of the SHA-3 family using AVX512 instructions. In: SIMPÓSIO BRASILEIRO DE SEGURANÇA DA INFORMAÇÃO E DE SISTEMAS COMPUTACIONAIS (SBSEG), 18. , 2018, Natal. Anais [...]. Porto Alegre: Sociedade Brasileira de Computação, 2018 . p. 361-368. DOI: https://doi.org/10.5753/sbseg.2018.4266.

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