Implementation and evaluation of the Xote stream cipher in dataplane in the Tofino programmable hardware

• Rodrigo A. de A. Pierini UNICAMP http://orcid.org/0009-0009-7707-5194
• Caio Teixeira UNICAMP https://orcid.org/0000-0002-9902-0866
• Christian Esteve Rothenberg UNICAMP https://orcid.org/0000-0003-3109-4305
• Marco Amaral Henriques UNICAMP https://orcid.org/0000-0001-9241-2229

DOI: https://doi.org/10.5753/sbrc.2025.6337

Abstract

This work introduces a novel element reordering technique applied to the Intel Tofino architecture’s packet interpreter, enabling the first-time implementation of the Xote algorithm on programmable data planes, and presents a comprehensive comparative performance analysis of the ChaCha, Forró, and Xote algorithms on this architecture. The results demonstrate that the ChaCha algorithm, when implemented with the proposed reordering technique, achieves higher maximum packet throughput and similar resource utilization compared to the other algorithms, surpassing previously reported results in the literature with a 1.65x increase in maximum throughput.

Keywords: Cryptography, Stream ciphers, Programmable networks, Network security

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