Symposium on Integrated Circuits and Systems Design (SBCCI)

Full Papers

• A Machine Learning Approach to Accelerating DSE of Reconfigurable Accelerator Systems

  Alba Sandyra Bezerra Lopes, Monica Magalhães Pereira

  1-6

  • IEEE Xplore
• A CMOS Analog Two-Layer Full Signal Range Cellular Neural Network for Image Filtering

  Fabian Souza de Andrade, Ana Isabela Araújo Cunha, Edson Pinto Santana, Ygor Oliveira da Guarda Souza

  7-12

  • IEEE Xplore
• Design Space Exploration of a Reconfigurable Accelerator in a Heterogeneous Multicore

  Francisco Carlos Silva, João Patrocinio, Ivan Saraiva Silva, Ricardo Pezzuol Jacobi

  13-18

  • IEEE Xplore
• Event-Based CMOS Image Sensor with Shared DVS Module for Pixel Area Reduction

  Tiago Lopes, Victor Oliveira, Fernanda Oliveira, José Gabriel Gomes

  19-24

  • IEEE Xplore
• Synthesis and Optimization of Majority Expressions through a Mathematical Model

  Evandro Ferraz, José O. Júnior, Ian Grout, Alexandre da Silva

  25-30

  • IEEE Xplore
• Hardware Accelerator for Shapelet Distance Computation in Time-Series Classification

  Victor Oliveira Costa, Carlos Gabriel de Araujo Gewehr, Julio Vicenzi, Everton Alceu Carrara, Leonardo Londero de Oliveira

  31-36

  • IEEE Xplore
• Unlocking the Full Potential of Heterogeneous Accelerators by Using a Hybrid Multi-Target Binary Translator

  Tiago Knorst, Julio Vicenzi, Michael Jordan, Jonathan Homercher de Almeida, Guilherme Korol, Antonio Carlos Schneider Beck, Mateus Beck Rutzig

  37-42

  • IEEE Xplore
• Maximizing Throughput-per-Joule of a Hybrid Communication Infrastructure Through a Software-Hardware based DVFS Mechanism

  Rafael Faccenda, Carlos Gabriel de Araujo Gewehr, Antonio Carlos Schneider Beck, Mateus Beck Rutzig

  43-48

  • IEEE Xplore
• The use of the analog wavelet filter to generate a sinusoidal signal and decompose the TEB signal into its cardiac and respiratory components in implantable cardiac pacemaker systems

  Guilherme Leal, Sandro Haddad

  49-54

  • IEEE Xplore
• 2PSA: An Optimized and Flexible Power-Precision Scalable Adder

  Roger Porto, Bruno Zatt, Nuno Roma, Luciano Agostini, Marcelo Porto

  55-60

  • IEEE Xplore
• Firefly: An Open-source Rocket-based Intermittent Framework

  Hiago Rocha, Guilherme Korol, Michael Jordan, Arthur Krause, Ronaldo Silveira, Caio Vieira, Philippe Navaux, Gabriel Nazar, Luigi Carro, Antonio Carlos Schneider Beck

  61-66

  • IEEE Xplore
• A 0.55-V 0.1oC-Accuracy All-CMOS Temperature Sensor for Implanted Devices

  Jader de Lima

  67-72

  • IEEE Xplore
• Characterization of Enclosed Layout Transistors for Analog Applications on a 130nm Technology

  Gustavo Platcheck, Guilherme Cardoso, Tiago Balen

  73-78

  • IEEE Xplore
• Analysis of single-module and cascade molecular analog circuits for approximate computing based on DNA Strand Displacement

  Poliana Oliveira, Maria Fonte Boa, Renan Marks, Marcos Guterres, Omar Vilela Neto

  79-84

  • IEEE Xplore
• Performance Comparison of High-Speed Dual Modulus Prescalers using Metaheuristics Sizing/Optimization

  João Navarro, Maximiliam Luppe

  85-90

  • IEEE Xplore
• Low-Voltage Dynamic Comparator with Bulk-Driven Floating Inverter Amplifier

  Bruno Canal, Hamilton Klimach, Sergio Bampi, Tiago Balen

  91-96

  • IEEE Xplore
• Multiple-objective Management based on a Distributed SDN Architecture for Many-cores

  Marcelo Ruaro, Fernando Moraes

  97-102

  • IEEE Xplore
• Mapping and Migration Strategies for Thermal Management in Many-Core Systems

  Alzemiro Lucas da Silva, André Luís del Mestre Martins, Fernando Moraes

  103-108

  • IEEE Xplore
• CLC-A: An Adaptive Implementation of the Column Line Code (CLC) ECC

  Felipe Silva, Adahil Muniz, Jarbas Silveira, César Marcon

  109-114

  • IEEE Xplore
• Modeling and Optimization of a Microprobe Detector for Area and Yield Improvement

  Alessandro Girardi, Helmut Graeb

  115-120

  • IEEE Xplore
• Evaluation of Cache-Based Memory Hierarchy for Video Decoding Applications

  Garrenlus de Souza, Sergio Bampi, Bruno Zatt, Felipe Sampaio

  121-126

  • IEEE Xplore
• A Novel Single Propagation Path Multimode PA

  Fávero Guilherme Santos, André Augusto Mariano, Bernardo Leite

  127-132

  • IEEE Xplore
• Directional Intra Frame Prediction Architecture with Edge Filter and Upsampling for AV1 Video Coding

  Luiz Neto, Marcel Corrêa, Daniel Palomino, Luciano Agostini, Guilherme Correa

  133-138

  • IEEE Xplore
• Evidence of a dynamic fault model in the DICE radiation-hardened cell

  William Souza da Cruz, Jean-Max Dutertre, Jean-Baptiste Rigaud, Guillaume Hubert

  139-144

  • IEEE Xplore
• Fractional-Order Instrumentation Amplifier Transfer Function for Control Applications

  Vassilis Alimisis, Georgios Pappas, Paul Sotiriadis

  145-150

  • IEEE Xplore
• A Novel Fully Integrated ULV SC DC-DC Converter for Indoor Light Energy Harvesting

  Luiz da Silva, Lucas Compassi Severo, Alessandro Girardi

  151-156

  • IEEE Xplore
• Reducing NoC Energy Consumption Exploring Asynchronous end-to-end GALS Communication

  Iaçanã Weber, Leonardo de Oliveira, Everton Carara, Fernando Moraes

  157-162

  • IEEE Xplore
• A SystemC profiling framework to improve fixed-point hardware utilization

  Alisson Linhares, Henrique Rusa, Daniel Formiga, Rodolfo Azevedo

  163-168

  • IEEE Xplore
• A 37 nW MOSFET-Only Voltage Reference in 0.13 um CMOS

  Vanessa de Lima, Hamilton Klimach

  169-174

  • IEEE Xplore
• A Management Technique for Concurrent Access to a Reconfigurable Accelerator

  Raul Silva, Guilherme Korol, Michael Jordan, Marcelo Brandalero, Michael Hübner, Monica Pereira, Mateus Beck Rutzig, Antonio Carlos Schneider Beck

  175-180

  • IEEE Xplore
• A Hardware Design for 3D-HEVC Depth Intra Skip with Synthesized View Distortion Change

  Vinicius Borges, Murilo Perleberg, Vladimir Afonso, Marcelo Porto, Luciano Agostini

  181-186

  • IEEE Xplore
• A Fine-grained Methodology for Accuracy-configurable and Energy-efficient Gaussian Filters Design

  Talita Alves Borges, Leonardo Bandeira Soares, Cristina Meinhardt

  187-192

  • IEEE Xplore
• Energy reduction opportunities in Field-Coupled Nanocomputing Adders

  Joao Fiche, Marco Sousa, Jeferson Chaves, Marco Ribeiro, Leandro Silva, Luiz Vieira, Omar Vilela Neto

  193-198

  • IEEE Xplore
• Performance and Variability Trade-offs of CMOS PTAT Generator Topologies for Voltage Reference Applications

  Vanessa de Lima, Rodrigo Ataide, Sergio Bampi, Hamilton Klimach

  199-204

  • IEEE Xplore
• A Straightforward Methodology for QCA Circuits Design

  Julio Saraçol Domingues, Leomar Soares da Rosa, Felipe de Souza Marques

  205-210

  • IEEE Xplore
• Standalone Rate-Distortion FME Architecture

  Vanio Rodrigues Filho, Marcio Monteiro, Ismael Seidel, Mateus Grellert, José Luís Güntzel

  211-216

  • IEEE Xplore
• Implementation of Asynchronous Pipelines with QDI Template onto FPGAs Using Commercial Tools

  Duarte Oliveira, Gabriel Duarte, Nicolly Cardoso, Gracieth Batista

  217-221

  • IEEE Xplore
• Model and simulation of Warpage in packaged IC strips after Mold Array Process

  Jose Ramirez, Ricardo Yoshioka, Carolina Nunes, Igor Fernandes Namba, Claudemir Coral

  222-226

  • IEEE Xplore
• All-digital FPGA-based RF pulsed transmitter with hardware complexity reduction techniques

  Nágila Ribeiro de Menezes, Hugo Daniel Hernandez, Dionísio Carvalho, Wilhelmus Van Noije

  227-231

  • IEEE Xplore
• A Hardware Accelerator for the Segmentation of Hyperspectral Images

  Arthur Passos, Felipe Viel, Cesar Zeferino

  232-236

  • IEEE Xplore